ATV750B Datasheet PDF - ATMEL

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ATV750B
ATMEL

Part Number ATV750B
Description High-speed UV Erasable Programmable Logic Device
Page 19 Pages


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Features
Advanced, High-speed Programmable Logic Device – Superset of 22V10
– Improved Performance - 7.5 ns tPD, 95 MHz External Operation
– Enhanced Logic Flexibility
– Backward Compatible with ATV750(L) Software and Hardware
New Flip-flop Features
D- or T-type
Product Term or Direct Input Pin Clocking
High-speed Erasable Programmable Logic Devices
7.5 ns Maximum Pin-to-pin Delay
Device
ATV750B
ATV750BL
ICC, Standby
125 mA
15 mA
Highest Density Programmable Logic Available in a 24-pin Package
Increased Logic Flexibility
42 Array Inputs, 20 Sum Terms and 20 Flip-flops
Enhanced Output Logic Flexibility
All 20 Flip-flops Feed Back Internally
10 Flip-flops are Also Available as Outputs
Full Military, Commercial and Industrial Temperature Ranges
Logic Diagram
Description
The ATV750B(L) is twice as powerful as most other 24-pin programmable logic
devices. Increased product terms, sum terms, flip-flops and output logic configurations
translate into more usable gates. High-speed logic and uniform, predictable delays
guarantee fast in-system performance.
High-speed UV
Erasable
Programmable
Logic Device
ATV750B
ATV750BL
Commercial and
industrial versions
are obsolete. Please
use ATF750C.
Military versions
continue to be available,
but please do not
use for new designs.
For new military
applications, recommend
multiple ATF22V10s.
Pin Configurations
Pin Name
CLK
IN
Function
Clock
Logic Inputs
I/O Bi-directional Buffers
* No Internal Connection
VCC +5V Supply
DIP/SOIC
PLCC/LCC
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 I/O
22 I/O
21 I/O
20 I/O
19 I/O
18 I/O
17 I/O
16 I/O
15 I/O
14 I/O
13 IN
IN 5
IN 6
IN 7
*8
IN 9
IN 10
IN 11
25 I/O
24 I/O
23 I/O
22 *
21 I/O
20 I/O
19 I/O
Rev. 0301I08/01
1



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Each of the ATV750B(L) 22 logic pins can be used as an input. Ten of these can be used as
inputs, outputs or bi-directional I/O pins. Each flip-flop is individually configurable as either D-
or T-type. Each flip-flop output is fed back into the array independently. This allows burying of
all the sum terms and flip-flops.
There are 171 total product terms available. A variable format is used to assign between four
to eight product terms per sum term. There are two sum terms per output, providing added
flexibility. Much more logic can be replaced by this device than by any other 24-pin PLD. With
20 sum terms and flip-flops, complex state machines are easily implemented with logic to
spare.
Product terms provide individual clocks and asynchronous resets for each flip-flop. Each flip-
flop may also be individually configured to have direct input pin controlled clocking. Each out-
put has its own enable product term. One product term provides a common synchronous
preset for all flip-flops. Register preload functions are provided to simplify testing. All registers
automatically reset upon power-up.
The ATV750BL is a low-power device with speeds as fast as 15 ns. The ATV750BL provides
the optimum low-power PLD solution, with full CMOS output levels. This device
significantly reduces total system power, thereby allowing battery-powered operation.
Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on Input Pins
with Respect to Ground
During Programming.....................................-2.0V to +14.0V(1)
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
Integrated UV Erase Dose..............................7258 Wsec/cm2
*NOTICE:
Stresses beyond those listed under Absolute
Maximum Ratingsmay cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Note:
1. Minimum voltage is -0.6V DC which may under-
shoot to -2.0V for pulses of less than
20 ns.Maximum output pin voltage is VCC + 0.75V
DC which may overshoot to +7.0V for pulses of
less than 20 ns.
Logic Options
Combinatorial Output
Combined Terms
Separate Terms
Registered Output
Combined Terms
Separate Terms
2 ATV750B(L)
0301I08/01



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Clock Mux
Output Options
CK MUX
CKi
CLOCK
PRODUCT
TERM
CLK
PIN
SELECT
TO
LOGIC
CELL
ATV750B(L)
DC and AC Operating Conditions(1)
Commercial
-7, -10, -15
Commercial
-25
Operating Temperature
0°C - 70°C
(Ambient)
0°C - 70°C
(Ambient)
VCC Power Supply
5V ± 5%
5V ± 10%
Note: 1. See ordering information for valid speed and temperature combination.
Industrial
-40°C - 85°C
(Ambient)
5V ± 10%
Military
-55°C - 125°C
(Case)
5V ± 10%
0301I08/01
3



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DC Characteristics
Symbol Parameter
Condition
Min Typ
Max
ILI Input Load Current VIN = -0.1V to VCC + 1V
Output Leakage
ILO Current
VOUT = -0.1V to VCC + 0.1V
Com.
10
10
125 180
B-7, -10
Ind., Mil.
125 190
Com.
125 180
ICC
IOS(1)
VIL
VIH
VOL
VOH
Note:
Power Supply
Current, Standby
VCC = MAX,
VIN = MAX,
Outputs Open
B-15, -25
BL-15
Ind., Mil.
Com.
Ind., Mil.
125 190
15 30
15 30
Output Short
Circuit Current
VOUT = 0.5V
-120
Input Low Voltage 4.5 VCC 5.5V
-0.6 0.8
Input High Voltage
2.0 VCC + 0.75
IOL = 16 mA Com., Ind.
0.5
Output Low
Voltage
VIN = VIH or VIL,
VCC = MIN
IOL = 12 mA
IOL = 24 mA
Mil.
Com.
0.5
0.8
Output High
Voltage
VIN = VIH or VIL,
VCC = MIN
IOH = -100 µA
IOH = -4.0 mA
VCC - 0.3
2.4
1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.
Units
µA
µA
mA
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
V
Input Test Waveforms and Measurement Levels
Output Test Load
tR, tF < 3 ns (10% to 90%)
4 ATV750B(L)
0301I08/01



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