ASM3P2863A Datasheet PDF - PulseCore Semiconductor

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ASM3P2863A
PulseCore Semiconductor

Part Number ASM3P2863A
Description Low Power Peak EMI Reducing Solution
Page 11 Pages


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January 2007
rev 0.3
Low Power Peak EMI Reducing Solution
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ASM3P2863A
Features
Generates an EMI optimized clock signal at the
output.
Integrated loop filter components.
Operates with a 3.3V /2.5V supply.
Operating current less than 4mA.
Low power CMOS design.
Input frequency : 12MHz
Generates a 1X low EMI spread spectrum clock
of the input frequency.
Frequency deviation: ± 0.4%(Typ) @ 12MHz
Input Frequency
Available in 6-pin TSOT-23, 8-pin SOIC and 8-
pin TSSOP packages.
Product Description
The ASM3P2863A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of clock frequencies. The ASM3P2863A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of all clock
dependent signals. The ASM3P2863A allows significant
system cost savings by reducing the number of circuit
board layers ferrite beads, shielding that are traditionally
required to pass EMI regulations.
The ASM3P2863A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all digital method.
The ASM3P2863A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
The ASM3P2863A is targeted towards all portable
devices with very low power requirements like MP3
players, Notebooks and Digital still cameras.
Key Specifications
Description
Supply voltages
Cycle-to-Cycle Jitter
Output Duty Cycle
Modulation Rate Equation
Frequency Deviation
Specification
VDD = 2.5V / 3.3V
200 pS ( Max)
45/55% (worst case)
FIN/256
± 0.4 % (Typ) @ 12MHz
Block Diagram
VDD
XIN
XOUT
REFOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
VSS
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.



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January 2007
rev 0.3
Pin Configuration (6-pin TSOT- 23 Package)
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ASM3P2863A
REFOUT 1
6 VSS
XOUT 2 ASM3P2863A 5 ModOUT
XIN / CLKIN 3
4 VDD
Pin Description
Pin# Pin Name
1 REFOUT
2 XOUT
3 XIN / CLKIN
4 VDD
5 ModOUT
6 VSS
Type
O
O
I
P
O
P
Description
Buffered output of the input frequency.
Crystal connection. If using an external reference, this pin must be left unconnected.
Crystal connection or external reference frequency input. This pin has dual functions.
It can be connected either to an external crystal or an external reference clock.
Power supply for the entire chip
Spread spectrum clock output.
Ground connection.
Low Power Peak EMI Reducing Solution
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January 2007
rev 0.3
Pin Configuration (8-pin SOIC and TSSOP Packages)
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ASM3P2863A
XIN / CLKIN 1
8 VDD
XOUT 2
REFOUT 3
ASM3P2863A 7 NC
6 ModOUT
NC 4
5 VSS
Pin Description
Pin# Pin Name
1 XIN / CLKIN
2 XOUT
3 REFOUT
4 NC
5 VSS
6 ModOUT
7 NC
8 VDD
Type
I
O
O
-
P
O
-
P
Description
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left unconnected.
Buffered output of the input frequency.
No connect.
Ground connection.
Spread spectrum clock output.
No connect.
Power supply for the entire chip
Modulation Profile
Specifications
Description
Input Frequency
Modulation Equation
Frequency Deviation
Specification
12MHz
FIN/256
± 0.4% ( Typ ) @ 12MHz
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January 2007
rev 0.3
Absolute Maximum Ratings
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ASM3P2863A
Symbol
Parameter
Rating
Unit
VDD, VIN
TSTG
TA
Ts
TJ
Voltage on any pin with respect to Ground
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
-0.5 to +4.6
-65 to +125
0 to 70
260
150
V
°C
°C
°C
°C
TDV Static Discharge Voltage
(As per JEDEC STD22- A114-B)
2 KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics for 2.5V Supply
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)
Symbol
Parameter
VIL Input low voltage
VIH Input high voltage
IIL Input low current
IIH Input high current
IXOL XOUT output low current (@0.5V, VDD=2.5V)
IXOH XOUT output high current (@1.8V, VDD=2.5V)
VOL Output low voltage (VDD = 2.5V, IOL = 8 mA)
VOH Output high voltage (VDD = 2.5V, IOH = 8 mA)
IDD Static supply current
ICC Dynamic supply current (2.5V, 12MHz and no load)
VDD Operating voltage
tON Power-up time (first locked cycle after power-up)
ZOUT Output impedance
* XIN / CLKIN pin is pulled low
Min
VSS - 0.3
2.0
1.8
2.375
Typ
3
3
0.8
3
2.5
50
Max
0.8
VDD + 0.3
-35
35
0.6
2.625
5
Unit
V
V
µA
µA
mA
mA
V
V
mA
mA
V
mS
AC Electrical Characteristics for 2.5V Supply
Symbol
Parameter
CLKIN
Input frequency
ModOUT
Output frequency
fd Frequency Deviation
tLH* Output rise time (measured from 0.7V to 1.7V)
tHL* Output fall time (measured from 1.7V to 0.7V)
tJC Jitter (Cycle to Cycle)
tD Output duty cycle
* tLH and tHL are measured into a capacitive load of 15pF
Min Typ Max Unit
- 12 - MHz
- 12 - MHz
- ±0.4 - %
0.5 1.5 1.7 nS
0.5 1.0 1.2 nS
- 200 - pS
45 50 55 %
Low Power Peak EMI Reducing Solution
Notice: The information in this document is subject to change without notice.
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