AK4490 Datasheet PDF - AKM

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AK4490
AKM

Part Number AK4490
Description Premium 32-Bit 2ch DAC
Page 30 Pages


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[AK4490]
AK4490
Premium 32-Bit 2ch DAC
1. General Description
AK4490 is a new generation Premium 32-bit 2ch DAC with new technologies, achieving industry’s leading
level low distortion characteristics and wide dynamic range. The AK4490 integrates a newly developed
switched capacitor filter OSR Doubler, making it capable of supporting wide range signals and
achieving low out-of-band noise while realizing low power consumption. Moreover, the AK4490 has five
types of 32-bit digital filters, realizing simple and flexible sound tuning in wide range of applications. The
AK4490 accepts up to 768kHz PCM data and 11.2MHz DSD data, ideal for a high-resolution audio source
playback that are becoming widespread in network audios, USB-DACs and Car Audio Systems.
Application: AV Receivers, CD/SACD player, Network Audios, USB DACs, USB Headphones, Sound
Plates/Bars, Car Audios, Automotive External Amplifiers, Measurement Equipment, Control
Systems, Public Audios (PA), Smart Cellular Phones, IC-Recorders, Bluetooth Headphones, HD
Audio/Voice Conference Systems
2. Features
256x Over sampling
Sampling Rate: 30kHz 768kHz
32-bit 8x Digital Filter
- Ripple: 0.005dB, Attenuation: 100dB
- Short Delay Sharp Roll-off, GD=6.25/fs
- Short Delay Slow Roll-off, GD=5.3/fs
- Sharp Roll-off
- Slow Roll-off
- Super Slow Roll-off
High Tolerance to Clock Jitter
Low Distortion Differential Output
2.8MHz, 5.6MHz and 11.2MHz DSD Input Support
- Filter (fc=50kHz, fc=150kHz, 2.8MHz mode)
Digital De-emphasis for 32, 44.1, 48kHz sampling
Soft Mute
Digital Attenuator (255 levels and 0.5dB step)
Mono Mode
External Digital Filter Mode
THD+N: -112dB
DR, S/N: 120dB (Mono mode: 123dB)
I/F Format: 24/32bit MSB justified, 16/20/24/32bit LSB justified, I2S, DSD
Master Clock:
30kHz ~ 32kHz: 1152fs
30kHz ~ 54kHz: 512fs or 768fs
30kHz ~ 108kHz: 256fs or 384fs
108kHz ~ 216kHz: 128fs or 192fs
~ 384kHz: 64fs or 128fs
~ 768kHz: 64fs
Power Supply: DVDD=AVDD=3.0 3.6V, VDD1/2=4.75 7.2V
Digital Input Level: CMOS
Package: 48-pin LQFP
MS1648-E-03
-1-
2014/11



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[AK4490]
3. Table of Contents
1. General Description....................................................................................................................................... 1
2. Features.......................................................................................................................................................... 1
3. Table of Contents .......................................................................................................................................... 2
4. Block Diagram............................................................................................................................................... 4
5. Pin Configurations and Functions ................................................................................................................. 5
Ordering Guide......................................................................................................................................... 5
Pin Layout ................................................................................................................................................ 5
Pin Functions ............................................................................................................................................ 6
Handling of Unused Pin ........................................................................................................................... 8
6. Absolute Maximum Ratings.......................................................................................................................... 9
7. Recommended Operating Conditions............................................................................................................ 9
8. Electrical Characteristics ............................................................................................................................. 10
Analog Characteristics............................................................................................................................ 10
Sharp Roll-Off Filter Characteristics (fs=44.1kHz) ............................................................................... 11
Sharp Roll-Off Filter Characteristics (fs=96kHz) .................................................................................. 11
Sharp Roll-Off Filter Characteristics (fs=192kHz) ................................................................................ 11
Short Delay Sharp Roll-Off Filter Characteristics (fs=44.1kHz) ........................................................... 13
Short Delay Sharp Roll-Off Filter Characteristics (fs=96kHz) .............................................................. 13
Short Delay Sharp Roll-Off Filter Characteristics (fs=192kHz) ............................................................ 13
Slow Roll-Off Filter Characteristics (fs=44.1kHz) ................................................................................ 15
Slow Roll-Off Filter Characteristics (fs=96kHz) ................................................................................... 15
Slow Roll-Off Filter Characteristics (fs=192kHz) ................................................................................. 15
Short Delay Slow Roll-Off Filter Characteristics (fs=44.1kHz) ............................................................ 17
Short Delay Slow Roll-Off Filter Characteristics (fs=96kHz) ............................................................... 17
Short Delay Slow Roll-Off Filter Characteristics (fs=192kHz) ............................................................. 17
DSD Mode Characteristics ..................................................................................................................... 19
DC Characteristics.................................................................................................................................. 19
Switching Characteristics ....................................................................................................................... 20
Timing Diagram ..................................................................................................................................... 22
9. Functional Descriptions............................................................................................................................... 27
D/A Conversion Mode ........................................................................................................................... 27
System Clock.......................................................................................................................................... 27
Audio Interface Format .......................................................................................................................... 34
D/A Conversion Mode Switching Timing.............................................................................................. 39
De-emphasis Filter.................................................................................................................................. 40
Output Volume (PCM, DSD) ................................................................................................................. 40
Zero Detection (PCM, DSD) .................................................................................................................. 41
Mono Output (PCM, DSD, EX DF I/F) ................................................................................................. 41
Sound Quality Control (PCM, DSD, Ex DF I/F).................................................................................... 41
Soft Mute Operation (PCM, DSD) ......................................................................................................... 43
System Reset .......................................................................................................................................... 43
Power ON/OFF timing ........................................................................................................................... 44
Reset Function ........................................................................................................................................ 45
Synchronize Function............................................................................................................................. 47
Register Control Interface ...................................................................................................................... 49
Register Map .......................................................................................................................................... 54
Register Definitions................................................................................................................................ 54
MS1648-E-03
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2014/11



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[AK4490]
10. Recommended External Circuits ............................................................................................................... 60
11. Package...................................................................................................................................................... 64
Outline Dimensions ................................................................................................................................ 64
Material & Lead finish ........................................................................................................................... 64
Marking .................................................................................................................................................. 65
12. Revision History........................................................................................................................................ 65
IMPORTANT NOTICE .................................................................................................................................. 68
MS1648-E-03
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2014/11



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4. Block Diagram
[AK4490]
BICK/DCLK/BCK
LRCK/DSDR/DINR
SDATA/DSDL/DINL
WCK
SSLOW
CSN/SMUTE
CCLK/DEM0
CDTI/DEM1
DVDD
DVSS
PCM
Data
Interface
DSD
Data
Interface
Normal path
DATT
DSDD bit 0Soft Mute
Volume bypass
DSDD bit 1
External
DF
Interface
PDN
Interpolator
AVDD
AVSS
SCF

Modulator
Bias
Vref
SCF
VSSL
VDDL
AOUTLP
AOUTLN
VCML
VREFHL
VREFLL
VREFLR
VREFLL
VCMR
AOUTRP
AOUTRN
Control
Register
Clock
Divider
CAD1/ACKS PSN DZFL/DIF0 DZFR/DIF1 CAD0/DIF2
MCLK
Block Diagram
VDDR
VSSR
MS1648-E-03
-4-
2014/11



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