ADV3227 Datasheet PDF - Analog Devices


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ADV3227
Analog Devices

Part Number ADV3227
Description 16 x 16 Analog Crosspoint Switch
Page 24 Pages

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Data Sheet
FEATURES
16 × 16 high speed, nonblocking switch array
Pinout and functionally equivalent to the AD8114/AD8115
Complete solution
Buffered inputs
Programmable high impedance outputs
16 output amplifiers, G = +1 (ADV3226), G = +2 (ADV3227)
Drives 150 Ω loads
Operates on ±5 V supplies
Low power: 1.3 W
Excellent ac performance
−3 dB bandwidth
200 mV p-p: 820 MHz (ADV3226), 750 MHz (ADV3227)
2 V p-p: 600 MHz (ADV3226), 750 MHz (ADV3227)
Slew rate: 2150 V/μs (ADV3226), 2950 V/μs (ADV3227)
Serial or parallel programming of switch array
100-lead LFCSP (12 mm × 12 mm)
APPLICATIONS
Routing of high speed signals including
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Data communications
Telecommunications
GENERAL DESCRIPTION
The ADV3226/ADV3227 are high speed 16 × 16 analog crosspoint
switch matrices. They offer a −3 dB signal bandwidth greater
than 750 MHz and channel switch times of less than 20 ns with
1% settling.
The ADV3226/ADV3227 include 16 independent output buffers
that can be placed into a high impedance state for paralleling
crosspoint outputs to prevent off channels from loading the
output bus. The ADV3226 has a gain of +1 and the ADV3227
has a gain of +2. They both operate on voltage supplies of ±5 V
750 MHz, 16 × 16
Analog Crosspoint Switch
ADV3226/ADV3227
CLK
DATAIN
UPDATE
CE
RESET
FUNCTIONAL BLOCK DIAGRAM
SER/PAR D0 D1 D2 D3 D4
80-BIT SHIFT REGISTER
WITH 5-BIT
PARALLEL LOADING
A0
A1
A2
A3
DATAOUT
80
PARALLEL LATCH
80
DECODE
16 × 5:16 DECODERS
SET INDIVIDUAL
OR RESET ALL
OUTPUTS TO OFF
16
ADV3226/
ADV3227
OUTPUT
256
BUFFER
G = +1,
G = +2
SWITCH
MATRIX
Figure 1.
while consuming only 118 mA (ADV3226) and 133 mA
(ADV3227) of idle current. Channel switching is performed via
a serial digital control that can accommodate daisy chaining of
several devices or via a parallel control to allow updating of an
individual output without reprogramming the entire array.
The ADV3226/ADV3227 are available in the 100-lead LFCSP
package over the extended industrial temperature range of
−40°C to +85°C.
Rev. A
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Tel: 781.329.4700 ©2010–2016 Analog Devices, Inc. All rights reserved.
Technical Support
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ADV3226/ADV3227
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics (Serial) .................................................. 5
Logic Levels ................................................................................... 5
Timing Characteristics (Parallel) ............................................... 6
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
Power Dissipation......................................................................... 7
REVISION HISTORY
1/16—Rev. 0 to Rev. A
Change to Maximum Potential Difference (DVCC − AVEE)
Parameter, Table 5............................................................................. 7
Updated Outline Dimensions ....................................................... 24
4/10—Revision 0: Initial Version
Data Sheet
ESD Caution...................................................................................7
Pin Configuration and Function Descriptions..............................8
Truth Table and Logic Diagram ............................................... 10
Typical Performance Characteristics ........................................... 11
Circuit Diagrams ............................................................................ 20
Theory of Operation ...................................................................... 21
Applications Information .......................................................... 21
Power-On Reset.......................................................................... 22
Gain Selection............................................................................. 22
Creating Larger Crosspoint Arrays.......................................... 23
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
Rev. A | Page 2 of 24



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Data Sheet
SPECIFICATIONS
VS = ±5 V, TA = +25°C, RL = 150 Ω, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Gain Flatness
Propagation Delay
Settling Time
Slew Rate
NOISE/DISTORTION PERFORMANCE
Differential Gain Error
Differential Phase Error
Crosstalk, All Hostile
Off Isolation, Input to Output
IMD2
IMD3
Output 1 dB Compression Point
Input Voltage Noise
DC PERFORMANCE
Gain Error
Gain Matching
Gain Temperature Coefficient
OUTPUT CHARACTERISTICS
Output Resistance
Output Disabled Capacitance
Output Leakage Current
Output Voltage Range
INPUT CHARACTERISTICS
Input Offset Voltage
Input Offset Voltage Drift
Input Voltage Range
Input Capacitance
Input Resistance
Input Bias Current
SWITCHING CHARACTERISTICS
Enable/Disable Time
Switching Time, 2 V Step
Switching Transient (Glitch)
Test Conditions/Comments
200 mV p-p
2 V p-p
0.1 dB, 2 V p-p
0.5 dB, 2 V p-p, CL = 2.2 pF
2 V p-p
1%, 2 V step
2 V step, peak
NTSC or PAL
NTSC or PAL
f = 100 MHz
f = 5 MHz
f = 100 MHz, one channel
f = 100 MHz, RL = 100 Ω
f = 500 MHz, RL = 100 Ω
f = 100 MHz, RL = 100 Ω
f = 500 MHz, RL = 100 Ω
f = 100 MHz, RL = 100 Ω
f = 500 MHz, RL = 100 Ω
0.01 MHz to 50 MHz
Channel-to-channel
DC, enabled
DC, disabled
Output disabled
No load
RL = 150 Ω
Short-circuit current
Worst case (all configurations)
No load
RL = 150 Ω
Any switch configuration
Any switch configuration
50% UPDATE to 1% settling
50% UPDATE to 1% settling
ADV3226/ADV3227
ADV3226
ADV3227
Min Typ Max Min Typ Max Unit
820
600
130
400
0.6
3
2150
750
750
60
200
0.6
3
2950
MHz
MHz
MHz
MHz
ns
ns
V/µs
0.04 0.02 %
0.01 0.01 Degrees
−45 −35 dB
−75 −60 dB
−80 −75 dB
47 dBm
22 dBm
42 dBm
14 dBm
18 dBm
9 dBm
16 16 nV/√Hz
0.1 1.0
1.0
0.8
0.4 1.5 %
1.5 %
16 ppm/°C
0.2 0.2 Ω
10 5 MΩ
2.7 2.7 pF
1 1 µA
±3 ±3 V
±2.8 ±2.8 V
55 55 mA
±5 ±5 mV
8 8 µV/°C
±3 ±1.5 V
±3 ±1.5 V
2.1 2.1 pF
2 2 MΩ
1 1 µA
20 20 ns
20 20 ns
40 65 mV p-p
Rev. A | Page 3 of 24



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ADV3226/ADV3227
Parameter
POWER SUPPLIES
Supply Current
Supply Voltage Range
PSRR
OPERATING TEMPERATURE RANGE
Temperature Range
θJA
Data Sheet
Test Conditions/Comments
AVCC, outputs enabled, no load
AVCC, outputs disabled
AVEE, outputs enabled, no load
AVEE, outputs disabled
DVCC, outputs enabled, no load
DC to 50 kHz, AVCC, AVEE
f = 100 kHz, AVCC, AVEE
f = 10 MHz, AVCC
f = 10 MHz, AVEE
f = 100 kHz, DVCC
Operating (still air)
Operating (still air)
ADV3226
ADV3227
Min Typ Max Min Typ Max Unit
110
25
110
25
8
±4.5 ±5
>60
55
45
35
90
130 125
35 25
130 125
35 25
10 8
±5.5 ±4.5 ±5
>60
60
40
55
80
140 mA
35 mA
140 mA
35 mA
10 mA
±5.5 V
dB
dB
dB
dB
dB
−40
26
+85 −40
26
+85 °C
°C/W
Rev. A | Page 4 of 24




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