ADP3208C Datasheet PDF - ON Semiconductor

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ADP3208C
ON Semiconductor

Part Number ADP3208C
Description CPU Synchronous Buck Controller
Page 30 Pages


ADP3208C datasheet pdf
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Preliminary
7-Bit,Programmablwwew.D,ataSDheetu4U.caom l-
Phase,Mobile,CPU,Synchronous
Buck Controller
ADP3208C
FEATURES
Single-chip solution
Fully compatible with the Intel® IMVP-6+™ specifications
Integrated MOSFET drivers
Input Voltage Range of 3.3 V to 22 V
Selectable 1- or 2-phase operation with up to 1 MHz per
phase switching frequency
Guaranteed ±8 mV worst-case differentially sensed core
voltage error over temperature
Automatic power-saving mode maximizes efficiency with
light load during deeper sleep operation
Soft transient control reduces inrush current and audio noise
Active current balancing between output phases
Independent current limit and load line setting inputs for
additional design flexibility
Built-in power-good blanking supports
voltage identification (VID) on-the-fly transients
7-bit, digitally programmable DAC with 0.3 V to 1.5 V output
Short-circuit protection with latch-off delay
Clock enable output delays the CPU clock until the core
voltage is stable
Output load current monitor
48-lead LFCSP
APPLICATIONS
Notebook power supplies for next-generation Intel processors
GENERAL DESCRIPTION
The ADP3208C is a highly efficient, multiphase, synchronous
buck switching regulator controller. With its integrated drivers,
the ADP3208C is optimized for converting the notebook
battery voltage into the core supply voltage required by high
performance Intel processors. An internal 7-bit DAC is used to
read a VID code directly from the processor and to set the CPU
core voltage to a value within the range of 0.3 V to 1.5 V. The
phase relationship of the output signals ensures interleaved 2-
phase operation.
The ADP3208C uses a multimode architecture run at a
programmable switching frequency and optimized for efficiency
depending on the output current requirement. The ADP3208C
switches between single- and dual-phase operation to maximize
efficiency with all load conditions. The chip includes a
programmable load line slope function to adjust the output voltage
as a function of the load current so that the core voltage is always
optimally positioned for a load transient. The ADP3208C also
provides accurate and reliable short-circuit protection,
adjustable current limiting, and a delayed power-good output.
The IC supports on-the-fly output voltage changes requested by
the CPU.
The ADP3208C is specified over the extended commercial
temperature range of -10°C to 100°C and is available in a 48-lead
LFCSP.
May 2008– Rev. 1



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ADP3208C
FUNCTIONAL BLOCK DIAGRAM
GND VCC EN RPM RT RAMP VARFREQ SP
COMP
FB
LLINE
PSI
UVLO
Shutdown
and Bias
+Σ
REF +
VEA
-
+
CSREF
+Σ _
1.7V
TTSNS
VRTT
Thermal
Throttle
Control
Oscillator
Current
Balancing
Circuit
OVP
Driver
Logic
DAC - 200mV
CSREF
-
+
-
+
DAC - 300mV
PWRGD
PWRGD
Open
Drain
CLKEN
FBRTN
CLKEN
Open
Drain
Precision
Reference
OCP
Shutdown
Delay
PWRGD
Start Up
Delay
CLKEN
Start Up
Delay
Current
Limit
Circuit
Soft
Transient
Delay
Delay
Disable
VID
DAC
DAC
REF
DPRSTP
DPRSLP
Logic
Current
Monitor
+
-
Soft Start
Soft Transient
BST1
DRVH1
SW1
PVCC1
DRVL1
PGND1
BST2
DRVH2
SW2
PVCC2
DRVL2
PGND2
DPRSTP
DPRSLP
IMON
CSREF
CSSUM
CSCOMP
ILIMN
ILIMP
Figure 1.
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Rev. 1 | Page 2 of 41 | www.onsemi.com



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TABLE OF CONTENTS
Features ...............................................................................................1
Applications .......................................................................................1
General Description..........................................................................1
Functional Block Diagram ...............................................................2
Revision History................................................................................3
Specifications .....................................................................................4
Timing Diagram................................................................................9
Absolute Maximum Ratings ..........................................................10
ESD Caution ................................................................................10
Pin Configuration and Function Descriptions ...........................11
Test Circuits .....................................................................................13
Typical Performance Characteristics............................................15
Theory of Operation .......................................................................19
Number of Phases .......................................................................19
Operation Modes ........................................................................19
Differential Sensing of Output Voltage ....................................22
Output Current Sensing .............................................................22
Active Impedance Control Mode..............................................22
CURRENT Control Mode AND THERMAL BALANCE ....23
Voltage Control Mode ................................................................23
Power-Good Monitoring............................................................23
Power-Up Sequence and Soft Start ...........................................23
Soft Transient...............................................................................24
Current Limit...............................................................................24
Changing VID on the Fly...........................................................25
REVISION HISTORY
5/08- Rev 1: Initial Preliminary Version
ADP3208Cwww.DataSheet4U.com
OUTPUT CROWBAR ...............................................................26
Reverse Voltage Protection ........................................................27
Output Enable and UVLO.........................................................27
Thermal Throttling Control ......................................................27
CURRENT MONITOR FUNCTION ......................................27
Application Information ................................................................31
Setting the Clock Frequency for PWM....................................31
Setting the Switching Frequency for RPM Operation of Phase
1 .....................................................................................................31
Inductor Selection.......................................................................31
COUT Selection..............................................................................33
Power MOSFETs .........................................................................34
Ramp Resistor Selection.............................................................35
COMP Pin Ramp ........................................................................35
Current Limit Setpoint...............................................................36
Output Current monitor ............................................................36
Feedback Loop Compensation Design ....................................36
CIN Selection and Input Current di/dt Reduction ..................37
Selecting Thermal Monitor Components................................38
Tuning Procedure for ADP3208C ............................................38
Layout and Component Placement ..........................................39
Outline Dimension .........................................................................41
Ordering Guide ...........................................................................41
Rev. 1 | Page 3 of 41 | www.onsemi.com



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ADP3208C
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SPECIFICATIONS
VCC = PVCC1 = PVCC2 = BST1 = BST2 = high = 5 V, FBRTN = GND = SW1 = SW2 = PGND1 = PGND2 = low = 0 V, EN = VARFREQ =
high, DPRSLP = 0 V, PSI = 1.05 V, VVID = 1.2000 V, TA = -10°C to 100°C, unless otherwise noted.1 Current entering a pin (sunk by the
device) has a positive sign. RREF = 80 kΩ.
Table 1.
Parameter
VOLTAGE CONTROL
VOLTAGE ERROR AMPLIFIER
(VEAMP)
FB, LLINE Voltage Range2
FB, LLINE Offset Voltage2
FB, LLINE Bias Current2
LLINE Positioning Accuracy
COMP Voltage Range2
COMP Current
COMP Slew Rate
Symbol
VFB, VLLINE
VOSVEA
IFB
VFB − VVID
VCOMP
ICOMP
SRCOMP
Gain Bandwidth2
VID DAC VOLTAGE REFERENCE
VDAC Voltage Range3
VDAC Accuracy
GBW
VFB − VVID
VDAC Differential
Nonlinearity2
VDAC Line Regulation
VDAC Boot Voltage2
Soft-start Delay2
Soft-start Time
Boot Delay
VDAC Slew Rate
ΔVFB
VBOOTFB
tDSS
tSS
tBOOT
FBRTN Current
VOLTAGE MONITORING
and PROTECTION
POWER GOOD
CSREF Under-voltage
Threshold
CSREF Over-voltage
Threshold
IFBRTN
VUVCSREF
VOVCSREF
Conditions
Min Typ
Max Units
Relative to CSREF = VDAC
Relative to CSREF = VDAC
Measured on FB relative to VVID, LLINE forced 80 mV
below CSREF
Operating Range
COMP = 2 V, CSREF = VDAC
FB forced 200 mV below CSREF
FB forced 200 mV above CSREF
CCOMP = 10 pF, CSREF = VDAC, Open loop
configuration
FB forced 200 mV below CSREF
FB forced 200 mV above CSREF
Non-inverting unit gain configuration, RFB = 1 kΩ
−200
-0.5
−100
−78
−80
0.85
−0.75
6
15
−20
20
+200
+0.5
100
−82
mV
mV
nA
mV
4.0 V
mA
mA
V/μs
V/μs
MHz
See VID table
Measured on FB (includes offset), relative to VVID,
for VID table see Table 6
VVID = 1.2125V to 1.5000V
VVID = 0.3000V to 1.2000V
0
−9
−7.5
−1
1.5 V
+9 mV
+7.5 mV
+1 LSB
VCC = 4.75 V to 5.25 V
Measured during boot delay period
Measured from EN pos edge to FB = 50 mV
Measured from EN pos edge to FB settles to Vboot =
1.2 V within -5 %
Measured from FB settling to Vboot = 1.2 V within -5
% to CLKEN# neg edge
Soft-start
Non-LSB VID step, DPRSLP = H, Slow C4 Entry/Exit
Non-LSB VID step, DPRSLP = L, Fast C4 Exit
0.05
1.200
200
1.7
%
V
μs
ms
150 μs
0.0625
0.25
1
90
200
LSB/μs
LSB/μs
LSB/μs
μA
Relative to DAC voltage = 0.5 V to 1.5 V
Relative to DAC voltage = 0.3 V to 0.4875 V
Relative to nominal DAC voltage
Rev. 1 | Page 4 of 41 | www.onsemi.com
−360
−360
150
−300
−200
200
−240
−160
250
mV
mV
mV



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