ABX2089 Datasheet PDF - Abracon Corporation

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ABX2089
Abracon Corporation

Part Number ABX2089
Description (ABX2088 / ABX2089) Low Phase Noise XO
Page 6 Pages


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ABX2088/89
Low Phase Noise XO (9.5-65MHz Output)
FEATURES
19MHz to 65MHz crystal input.
Output range: 9.5MHz – 65MHz
Complementary outputs: PECL or LVDS output.
Selectable OE Logic (enable high or enable low).
Supports 2.5V or 3.3V Power Supply.
Available in 16 pin TSSOP package.
DESCRIPTION
The ABX2088 (PECL) and ABX2089 (LVDS) are XO
ICs specifically designed to work with fundamental
or 3rd OT crystals between 19MHz and 65MHz. The
selectable divide by two feature extends the
operation range from 9.5MHz to 65MHz. They
require very low current into the crystal resulting in
better overall stability. The OE logic feature allows
selection of enable high or enable low.
BLOCK DIAGRAM
Oscillator
X+ Amplifier
X-
O
Q
Q
S2
ABX208X Block Diagram
PIN CONFIGURATION
VDD
XIN
XOUT
DNC
S2
OE
N/C
GND
1
2
3
4
5
6
7
8
16 DNC
15 DNC
14 GNDBUF
13 QBAR
12 VDDBUF
11 Q
10 GNDBUF
9 GND
OUTPUT SELECTION AND ENABLE
OE_SELECT OE_CTRL
State
0
1 (Default)
0
1 (Default)
0 (Default)
1
Tri-state
Output enabled
Output enabled
Tri-state
Input selection: Bond to GND to set to “0”, bond to VDD to set to “1”
No connection results to “default” setting through
internal pull-up/-down.
OE_CTRL:
Logical states defined by PECL levels if
OE_SELECT is “1”
Logical states defined by CMOS levels if
OE_SELECT is “0”
OUTPUT FREQUENCY DIVIDE BY
TWO SELECTOR
S2 Output
0 Intput/2
1 Input
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 1



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ABX2088/89
Low Phase Noise XO (9.5-65MHz Output)
PIN AND PAD ASSIGNMENT
Name
VDD
XIN
XOUT
DNC
S2
OE_CTRL
DNC
GND
GNDBUF
Q
VDDBUF
QBAR
GNDBUF
DNC
DNC
Pin# Description
1 Power Supply.
2 Crystal input. See Crystal Specification on page 3.
3 Crystal output. See Crystal Specification on page 3.
4 Do Not Connect.
5
Output Divide by Two selector pin. See the OUTPUT DIVIDE BY TWO SELECTOR Table on
page 1.
6 Output Enable input. See OUTPUT SELECTION AND ENABLE TABLE on page 1.
8 Do Not Connect.
9 Ground.
10 Ground for output buffer circuitry.
11 PECL or LVDS output.
12 Power supply for output buffer circuitry.
13 Complementary PECL or LVDS output.
14 Ground for output buffer circuitry.
15 Do Not Connect.
16 Do Not Connect.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
VDD 4.6 V
VI
-0.5 VDD+0.5
V
VO
-0.5 VDD+0.5
V
TS -65 150 °C
TA -40 85 °C
TJ 125 °C
260 °C
2 kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 2



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ABX2088/89
Low Phase Noise XO (9.5-65MHz Output)
2. Crystal Specifications
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Rating
Interelectrode Capacitance
Recommended ESR
SYMBOL
FXIN
CL (xtal)
C0
RE
CONDITIONS
Fundamental
AT cut
MIN. TYP.
19
8.5
MAX.
65
5
30
UNITS
MHz
pF
pF
3. General Electrical Specifications
PARAMETERS
Supply Current (Loaded
Outputs)
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
SYMBOL
CONDITIONS
IDD PECL/LVDS
VDD
@ 1.25V (LVDS)
@ VDD – 1.3V (PECL)
MIN.
2.97
45
45
TYP.
50
50
±50
MAX.
100/80
3.63
55
55
UNITS
mA
V
%
mA
4. Jitter Specifications
PARAMETERS
Period jitter RMS at 27MHz
Period jitter peak-to-peak at 27MHz
Accumulated jitter RMS at 27MHz
Accumulated jitter peak-to-peak at
27MHz
Random Jitter
Measured on Wavecrest SIA 3000
CONDITIONS
With capacitive decoupling
between VDD and GND. Over
10,000 cycles
With capacitive decoupling
between VDD and GND. Over
1,000,000 cycles.
“RJ” measured on Wavecrest SIA
3000
MIN.
TYP.
2.3
18.5
2.3
24
2.3
MAX. UNITS
ps
20
ps
25
ps
5. Phase Noise Specifications
PARAMETERS
FREQUENCY
Phase Noise relative
to carrier
27MHz
Note: Phase Noise measured on Agilent E5500
@10Hz
-75
@100Hz @1kHz @10kHz @100kHz UNITS
-100 -125 -140
-145 dBc/Hz
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 3



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ABX2088/89
Low Phase Noise XO (9.5-65MHz Output)
6. LVDS Electrical Characteristics
PARAMETERS
SYMBOL
Output Differential Voltage
VDD Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-off Leakage
Output Short Circuit Current
VOD
VOD
VOH
VOL
VOS
VOS
IOXD
IOSD
CONDITIONS
RL = 100
(see figure)
Vout = VDD or GND
VDD = 0V
7. LVDS Switching Characteristics
PARAMETERS
SYMBOL
Differential Clock Rise Time
tr
Differential Clock Fall Time
tf
CONDITIONS
RL = 100
CL = 10 pF
(see figure)
MIN.
247
-50
0.9
1.125
0
MIN.
0.2
0.2
TYP.
355
1.4
1.1
1.2
3
±1
-5.7
MAX.
454
50
1.6
1.375
25
±10
-8
UNITS
mV
mV
V
V
V
mV
uA
mA
TYP.
0.7
0.7
MAX.
1.0
1.0
UNITS
ns
ns
LVDS Levels Test Circuit
OUT
OUT
VOD
50
VOS
50
LVDS Switching Test Circuit
OUT
CL = 10pF
VDIFF
OUT
CL = 10pF
RL = 100
LVDS Transistion Time Waveform
OUT
OUT
0V (Differential)
VDIFF
0V
20%
80%
tR
80%
20%
tF
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 4



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