80960CF-16 Datasheet PDF - Intel Corporation


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80960CF-16
Intel Corporation

Part Number 80960CF-16
Description SPECIAL ENVIRONMENT 80960CF-30/ -25/ -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR
Page 30 Pages

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PRELIMINARY
80960CF-40, -33, -25, -16
32-BIT HIGH-PERFORMANCE SUPERSCALAR
EMBEDDED MICROPROCESSOR
• Socket and Object Code Compatible with 80960CA
• Two Instructions/Clock Sustained Execution
• Four 71 Mbytes/s DMA Channels with Data Chaining
• Demultiplexed 32-Bit Burst Bus with Pipelining
s 32-Bit Parallel Architecture
— Two Instructions/clock Execution
— Load/Store Architecture
— Sixteen 32-Bit Global Registers
— Sixteen 32-Bit Local Registers
— Manipulates 64-Bit Bit Fields
— 11 Addressing Modes
— Full Parallel Fault Model
— Supervisor Protection Model
s Fast Procedure Call/Return Model
— Full Procedure Call in 4 Clocks
s On-Chip Register Cache
— Caches Registers on Call/Ret
— Minimum of 6 Frames Provided
— Up to 15 Programmable Frames
s On-Chip Instruction Cache
— 4 Kbyte Two-Way Set Associative
— 128-Bit Path to Instruction Sequencer
— Cache-Lock Modes
— Cache-Off Mode
s High Bandwidth On-Chip Data RAM
— 1 Kbyte On-Chip Data RAM
— Sustains 128 bits per Clock Access
s Selectable Big or Little Endian Byte
Ordering
s Four On-Chip DMA Channels
— 71 Mbytes/s Fly-by Transfers
— 40 Mbytes/s Two-Cycle Transfers
— Data Chaining
— Data Packing/Unpacking
— Programmable Priority Method
s 32-Bit Demultiplexed Burst Bus
— 128-Bit Internal Data Paths to and from
Registers
— Burst Bus for DRAM Interfacing
— Address Pipelining Option
— Fully Programmable Wait States
— Supports 8-, 16- or 32-Bit Bus Widths
— Supports Unaligned Accesses
— Supervisor Protection Pin
s High-Speed Interrupt Controller
— Up to 248 External Interrupts
— 32 Fully Programmable Priorities
— Multi-mode 8-Bit Interrupt Port
— Four Internal DMA Interrupts
— Separate, Non-maskable Interrupt Pin
— Context Switch in 625 ns Typical
s On-Chip Data Cache
— 1 Kbyte Direct-Mapped, Write Through
— 128 bits per Clock Access on Cache Hit
© INTEL CORPORATION, 1996
June 1996
Order Number: 272886-001



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Copies of documents which have an ordering number and are referenced in this document, or other Intel
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or call 1-800-548-4725



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CONTENTS
80960CF-40, -33, -25, -16
32-BIT HIGH-PERFORMANCE SUPERSCALAR
EMBEDDED MICROPROCESSOR
1.0 PURPOSE .................................................................................................................................................. 1
2.0 80960CF OVERVIEW ................................................................................................................................ 1
2.1 The 80960C-Series Core .................................................................................................................... 3
2.2 Pipelined, Burst Bus ........................................................................................................................... 3
2.3 Instruction Set Summary .................................................................................................................... 3
2.4 Flexible DMA Controller ...................................................................................................................... 3
2.5 Priority Interrupt Controller .................................................................................................................. 4
3.0 PACKAGE INFORMATION ........................................................................................................................ 5
3.1 Package Introduction .......................................................................................................................... 5
3.2 Pin Descriptions .................................................................................................................................. 5
3.3 80960CF Mechanical Data ............................................................................................................... 12
3.3.1 80960CF PGA PINOUT ......................................................................................................... 12
3.3.2 80960CF PQFP Pinout (80960CF-33, -25, -16 Only) ............................................................ 16
3.4 Package Thermal Specifications ...................................................................................................... 19
3.5 Stepping Register Information .......................................................................................................... 22
3.6 Sources for Accessories ................................................................................................................... 22
4.0 ELECTRICAL SPECIFICATIONS ............................................................................................................ 23
4.1 Absolute Maximum Ratings .............................................................................................................. 23
4.2 Operating Conditions ........................................................................................................................ 23
4.3 Recommended Connections ............................................................................................................ 24
4.4 DC Specifications ............................................................................................................................. 24
4.5 AC Specifications .............................................................................................................................. 26
4.5.1 AC TEST CONDITIONS ........................................................................................................ 36
4.5.2 AC TIMING WAVEFORMS .................................................................................................... 37
4.5.3 DERATING CURVES ............................................................................................................. 41
5.0 RESET, BACKOFF AND HOLD ACKNOWLEDGE ................................................................................ 42
6.0 BUS WAVEFORMS .................................................................................................................................. 44
7.0 REVISION HISTORY ............................................................................................................................... 71
PRELIMINARY
iii



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80960CF Block Diagram ............................................................................................................ 2
80960CF PGA Pinout—View from Top (Pins Facing Down) .................................................... 12
80960CF PGA Pinout — View from Bottom (Pins Facing Up) ................................................. 13
80960CF PQFP Pinout—Top View (80960CF-33, -25, -16 Only) ............................................ 19
Measuring 80960CF PGA and PQFP Case Temperature ....................................................... 20
Register g0 ............................................................................................................................... 22
AC Test Load ........................................................................................................................... 37
Input and Output Clocks Waveform ......................................................................................... 37
CLKIN Waveform ..................................................................................................................... 37
Output Delay and Float Waveform ........................................................................................... 38
Input Setup and Hold Waveform .............................................................................................. 38
NMI, XINT7:0 Input Setup and Hold Waveform ....................................................................... 39
Hold Acknowledge Timings ...................................................................................................... 39
Bus Backoff (BOFF) Timings ................................................................................................... 40
Relative Timings Waveforms ................................................................................................... 40
Output Delay or Hold vs. Load Capacitance ............................................................................ 41
Rise and Fall Time Derating at Highest Operating Temperature and Minimum VCC ............... 41
ICC vs. Frequency and Temperature—80960CF-33, -25, -16 .................................................. 42
ICC vs. Frequency and Temperature—80960CF-40 ................................................................ 42
Cold Reset Waveform .............................................................................................................. 44
Warm Reset Waveform ............................................................................................................ 45
Entering the ONCE State ......................................................................................................... 46
Clock Synchronization in the 2-x Clock Mode .......................................................................... 47
Clock Synchronization in the 1-x Clock Mode .......................................................................... 47
Non-Burst, Non-Pipelined Requests Without Wait States ........................................................ 48
Non-Burst, Non-Pipelined Read Request With Wait States ..................................................... 49
Non-Burst, Non-Pipelined Write Request With Wait States ..................................................... 50
Burst, Non-Pipelined Read Request Without Wait States, 32-Bit Bus ..................................... 51
Burst, Non-Pipelined Read Request With Wait States, 32-Bit Bus .......................................... 52
Burst, Non-Pipelined Write Request Without Wait States, 32-Bit Bus ..................................... 53
Burst, Non-Pipelined Write Request With Wait States, 32-Bit Bus .......................................... 54
Burst, Non-Pipelined Read Request With Wait States, 16-Bit Bus .......................................... 55
Burst, Non-Pipelined Read Request With Wait States, 8-Bit Bus ............................................ 56
Non-Burst, Pipelined Read Request Without Wait States, 32-Bit Bus ..................................... 57
Non-Burst, Pipelined Read Request With Wait States, 32-Bit Bus .......................................... 58
Burst, Pipelined Read Request Without Wait States, 32-Bit Bus ............................................. 59
Burst, Pipelined Read Request With Wait States, 32-Bit Bus .................................................. 60
Burst, Pipelined Read Request With Wait States, 16-Bit Bus .................................................. 61
Burst, Pipelined Read Request With Wait States, 8-Bit Bus .................................................... 62
iv PRELIMINARY




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