80546KF Datasheet PDF - Intel


www.Datasheet-PDF.com

80546KF
Intel

Part Number 80546KF
Description 64 Bit Processor
Page 30 Pages

80546KF datasheet pdf
View PDF for PC
80546KF pdf
View PDF for Mobile


No Preview Available !

64-bit Intel® Xeon™ Processor
MP with up to 8MB L3 Cache
Datasheet
March 2005
Document Number: 306754-001



No Preview Available !

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 64-Bit Intel® Xeon™ processor MP with up to 8MB L3 cache may contain design defects or errors known as errata which may cause the product
to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel.
Implementations of the I2C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips
Corporation.
Intel, Pentium, Intel Xeon, Intel NetBurst, Intel SpeedStep and the Intel logo are trademarks or registered trademarks of Intel Corporation or its
subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2005, Intel Corporation.
2 64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet



No Preview Available !

Contents
1 Introduction....................................................................................................................... 11
1.1 Terminology......................................................................................................... 12
1.2 References .......................................................................................................... 14
1.3 State of Data ....................................................................................................... 15
2 Electrical Specifications.................................................................................................... 17
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
Front Side Bus and GTLREF .............................................................................. 17
2.1.1 Front Side Bus Clock and Processor Clocking....................................... 18
2.1.2 Front Side Bus Clock Select (BSEL[1:0]) ............................................... 19
2.1.3 Phase Lock Loop (PLL) Power and Filter............................................... 19
Voltage Identification (VID).................................................................................. 20
Cache Voltage Identification (CVID).................................................................... 23
Reserved, Unused, and TESTHI Pins.................................................................24
Mixing Processors ............................................................................................... 24
Front Side Bus Signal Groups............................................................................. 25
GTL+ Asynchronous and AGTL+ Asynchronous Signals ................................... 27
Test Access Port (TAP) Connection.................................................................... 27
Maximum Ratings................................................................................................ 27
Processor DC Specifications............................................................................... 28
2.10.1 Flexible Motherboard (FMB) Guidelines................................................. 28
2.10.2 VCC and VCACHE Overshoot Specification.......................................... 32
2.10.3 Die Voltage Validation ............................................................................ 33
AGTL+ Front Side Bus Specifications .................................................................37
Front Side Bus AC Specifications ....................................................................... 37
Processor AC Timing Waveforms ....................................................................... 42
3 Front Side Bus Signal Quality Specifications ................................................................... 53
3.1 Front Side Bus Signal Quality Specifications and Measurement Guidelines ...... 53
3.1.1 Ringback Guidelines .............................................................................. 53
3.1.2 Overshoot/Undershoot Guidelines ......................................................... 56
3.1.3 Overshoot/Undershoot Magnitude ......................................................... 56
3.1.4 Overshoot/Undershoot Pulse Duration................................................... 57
3.1.5 Activity Factor......................................................................................... 57
3.1.6 Reading Overshoot/Undershoot Specification Tables............................ 57
3.1.7 Determining if a System Meets Over/Undershoot Specifications........... 58
4 Mechanical Specifications ................................................................................................ 61
4.1 Package Mechanical Drawing ............................................................................. 62
4.2 Processor Component Keep-Out Zones ............................................................. 65
4.3 Package Loading Specifications ......................................................................... 65
4.4 Package Handling Guidelines ............................................................................. 66
4.5 Package Insertion Specifications ........................................................................ 66
4.6 Processor Mass Specifications ........................................................................... 66
4.7 Processor Materials............................................................................................. 66
4.8 Processor Markings............................................................................................. 67
4.9 Processor Pin-Out Coordinates........................................................................... 68
64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
3



No Preview Available !

5 Pin Listing......................................................................................................................... 69
5.1 Processor Pin Assignments ................................................................................ 69
5.1.1 Pin Listing by Pin Name ......................................................................... 69
5.1.2 Pin Listing by Pin Number ...................................................................... 78
6 Signal Definitions ............................................................................................................. 87
6.1 Signal Definitions ................................................................................................ 87
7 Thermal Specifications..................................................................................................... 97
7.1 Package Thermal Specifications ......................................................................... 97
7.1.1 Thermal Specifications ........................................................................... 97
7.1.2 Thermal Metrology ............................................................................... 100
7.2 Processor Thermal Features............................................................................. 100
7.2.1 Thermal Monitor ................................................................................... 100
7.2.2 Thermal Monitor 2 ................................................................................ 101
7.2.3 On-Demand Mode................................................................................ 102
7.2.4 PROCHOT# Signal Pin ........................................................................ 103
7.2.5 FORCEPR# Signal Pin ........................................................................ 103
7.2.6 THERMTRIP# Signal Pin ..................................................................... 103
7.2.7 TCONTROL and Fan Speed Reduction............................................... 103
7.2.8 Thermal Diode...................................................................................... 104
8 Features ......................................................................................................................... 105
8.1 Power-On Configuration Options ...................................................................... 105
8.2 Clock Control and Low Power States................................................................ 105
8.2.1 Normal State ........................................................................................ 106
8.2.2 HALT or Enhanced Power Down State ................................................ 106
8.2.3 Stop-Grant State .................................................................................. 107
8.2.4 Enhanced HALT Snoop State or HALT Snoop State,
Stop Grant Snoop State ....................................................................... 108
8.3 Enhanced Intel SpeedStep® Technology.......................................................... 108
8.4 System Management Bus (SMBus) Interface ................................................... 109
8.4.1 Processor Information ROM (PIROM).................................................. 110
8.4.2 Scratch EEPROM ................................................................................ 112
8.4.3 PIROM and Scratch EEPROM Supported SMBus Transactions ......... 113
8.4.4 SMBus Thermal Sensor ....................................................................... 113
8.4.5 Thermal Sensor Supported SMBus Transactions ................................ 114
8.4.6 SMBus Thermal Sensor Registers ....................................................... 115
8.4.7 SMBus Thermal Sensor Alert Interrupt ................................................ 118
8.4.8 SMBus Device Addressing................................................................... 118
8.4.9 Managing Data in the PIROM .............................................................. 120
9 Boxed Processor Specifications..................................................................................... 127
9.1 Introduction ....................................................................................................... 127
9.2 Mechanical Specifications ................................................................................. 128
9.2.1 Boxed Processor Heatsink Dimensions ............................................... 128
9.2.2 Boxed Processor Heatsink Weight....................................................... 135
9.2.3 Boxed Processor Retention Mechanism and Heatsink Supports......... 135
9.3 Thermal Specifications...................................................................................... 135
9.3.1 Boxed Processor Cooling Requirements ............................................. 135
9.3.2 Boxed Processor Contents .................................................................. 136
4 64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet




80546KF datasheet pdf
Download PDF
80546KF pdf
View PDF for Mobile


Similiar Datasheets : 80546KF

Index :   0   1   2   3   4   5   6   7   8   9   A   B   C   D   E   F   G   H   I   J   K   L   M   N   O   P   Q   R   S   T   U   V   W   X   Y   Z   

This is a individually operated, non profit site. If this site is good enough to show, please introduce this site to others.
Since 2010   ::   HOME   ::   Privacy Policy + Contact