80486GX Datasheet PDF - Intel


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80486GX
Intel

Part Number 80486GX
Description Embedded Ultra-Low Power Processor
Page 30 Pages

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EMBEDDED ULTRA-LOW POWER Intel486GX PROCESSOR
s Ultra-Low Power Member of the Intel486™ s 16-Bit External Data Bus
Processor Family
— 32-Bit RISC Technology Core
— 8-Kbyte Write-Through Cache
— Four Internal Write Buffers
s 176-Lead Thin Quad Flat Pack (TQFP)
s Separate Voltage Supply for Core Circuitry
s Fast Core-Clock Restart
— Burst Bus Cycles
s Auto Clock Freeze
— Data Bus Parity Generation and
Checking
s Ideal for Embedded Battery-Operated and
Hand-Held Applications
— Intel System Management Mode (SMM)
— Boundary Scan (JTAG)
Barrel
Shifter
Register
File
ALU
Base/
Index
Bus
32
64-Bit Interunit Transfer Bus
32-Bit Data Bus
32
32-Bit Data Bus
32
Linear Address
32
Segmentation
Unit
Descriptor
Registers
Limit and
Attribute PLA
Paging
Unit
PCD
PWT
2
20
Translation
Lookaside
Buffer
Physical
Address
Cache Unit
8 Kbyte
Cache
Core
Clock
Clock
Control
CLK Input
Bus Interface
32 Address
Drivers
Write Buffers
32 4 x 32
Data Bus
32 Transceivers
A31-A2
BE3#- BE0#
D15-D0
Micro-
Instruction
Displacement Bus
32
128
Prefetcher
Control &
Protection
Test Unit
Instruction
Decode
Code
Stream
24
32-Byte Code
Queue
2x16 Bytes
Control
ROM
Decoded
Instruction
Path
Bus Control
Request
Sequencer
Burst Bus
Control
ADS# W/R# D/C# M/IO#
PCD PWT RDY# LOCK#
PLOCK# BOFF# A20M#
BREQ HOLD HLDA
RESET SRESET INTR
NMI SMI# SMIACT#
STPCLK#
BRDY# BLAST#
Parity
Generation
and Control
Cache
Control
Boundary
Scan
Control
DP1-DP0, PCHK#
KEN# FLUSH#
AHOLD EADS#
TCK TMS
TDI TD0
A5851-01
Figure 1. Embedded Ultra-Low Power Intel486™ GX Processor Block Diagram
© INTEL CORPORATION, 1997
December 1997
Order Number: 272755-002



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Information in this document is provided in connection with Intel products. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in
Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel
disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or
warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright
or other intellectual property right. Intel products are not intended for use in medical, life saving, or life
sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or
"undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or
incompatibilities arising from future changes to them.
The Embedded Ultra-Low Power Intel486™ GX processor may contain design defects or errors known as
errata which may cause the product to deviate from published specifications. Current characterized errata are
available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your
product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel
literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com.
Copyright © Intel Corporation, 1997
*Third-party brands and names are the property of their respective owners.



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Contents
Embedded Ultra-Low Power Intel486GX Processor
1.0 INTRODUCTION ........................................................................................................................................ 1
1.1 Features ............................................................................................................................................. 1
1.2 Family Members ................................................................................................................................. 3
2.0 HOW TO USE THIS DOCUMENT ............................................................................................................. 3
3.0 PIN DESCRIPTIONS ................................................................................................................................. 3
3.1 Pin Assignments ................................................................................................................................. 3
3.2 Pin Quick Reference ........................................................................................................................... 7
4.0 ARCHITECTURAL AND FUNCTIONAL OVERVIEW ............................................................................. 15
4.1 Separate Supply Voltages ................................................................................................................ 15
4.2 Fast Clock Restart ............................................................................................................................ 16
4.3 Level-Keeper Circuits ....................................................................................................................... 17
4.4 Low-Power Features ........................................................................................................................ 18
4.4.1 Auto Clock Freeze ................................................................................................................. 18
4.5 Bus Interface and Operation ............................................................................................................. 19
4.5.1 16-Bit Data Bus ...................................................................................................................... 19
4.5.2 Parity ...................................................................................................................................... 19
4.5.3 Data Transfer Mechanism ...................................................................................................... 19
4.6 CPUID Instruction ............................................................................................................................. 27
4.6.1 Operation of the CPUID Instruction ....................................................................................... 27
4.7 Identification After Reset .................................................................................................................. 29
4.8 Boundary Scan (JTAG) .................................................................................................................... 29
4.8.1 Device Identification ............................................................................................................... 29
4.8.2 Boundary Scan Register Bits and Bit Order ........................................................................... 29
5.0 ELECTRICAL SPECIFICATIONS ........................................................................................................... 30
5.1 Maximum Ratings ............................................................................................................................. 30
5.2 DC Specifications ............................................................................................................................. 30
5.3 AC Specifications ............................................................................................................................. 34
5.4 Capacitive Derating Curves .............................................................................................................. 41
6.0 MECHANICAL DATA .............................................................................................................................. 42
6.1 Package Dimensions ........................................................................................................................ 42
6.2 Package Thermal Specifications ...................................................................................................... 43
FIGURES
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Embedded Ultra-Low Power Intel486™ GX Processor Block Diagram ...................................... i
Package Diagram for 176-Lead TQFP Package Embedded ULP Intel486™ GX Processor .... 4
Example of Supply Voltage Power Sequence ......................................................................... 16
Stop Clock State Diagram with Typical Power Consumption Values ...................................... 17
Logic to Generate A1, BHE# and BLE# ................................................................................... 19
iii



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Contents
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Address Prediction for Burst Transfers (1 of 3) ........................................................................ 25
Address Prediction for Burst Transfers (2 of 3) ........................................................................ 26
Address Prediction for Burst Transfers (3 of 3) ........................................................................ 27
CLK Waveform ......................................................................................................................... 37
Input Setup and Hold Timing ................................................................................................... 37
Input Setup and Hold Timing ................................................................................................... 38
Output Valid Delay Timing ....................................................................................................... 38
PCHK# Valid Delay Timing ...................................................................................................... 39
Maximum Float Delay Timing .................................................................................................. 39
TCK Waveform ........................................................................................................................ 40
Test Signal Timing Diagram ..................................................................................................... 40
Typical Loading Delay versus Load Capacitance under Worst-Case Conditions
for a Low-to-High Transition ..................................................................................................... 41
Typical Loading Delay versus Load Capacitance under Worst-Case Conditions
for a High-to-Low Transition ..................................................................................................... 41
Package Mechanical Specifications for the 176-Lead TQFP Package .................................... 42
TABLES
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
The Embedded Ultra-Low Power Intel486GX Processor ....................................................... 3
Pin Assignment for 176-Lead TQFP Package Embedded ULP Intel486™ GX Processor ........ 5
Pin Cross Reference for 176-Lead TQFP Package Embedded ULP
Intel486™ GX Processor ........................................................................................................... 6
Embedded ULP Intel486™ GX Processor Pin Descriptions ...................................................... 7
Output Pins .............................................................................................................................. 13
Input/Output Pins ..................................................................................................................... 13
Test Pins .................................................................................................................................. 14
Input Pins ................................................................................................................................. 14
Valid Byte-Enable Cycles ......................................................................................................... 20
Address Sequence for Cache Line Transfers and Instruction Prefetches ............................... 22
Valid Burst Cycle Sequences - I/O Reads and All Writes ........................................................ 23
CPUID Instruction Description ................................................................................................. 28
Boundary Scan Component Identification Code ...................................................................... 29
Absolute Maximum Ratings ..................................................................................................... 30
Operating Supply Voltages ...................................................................................................... 31
DC Specifications ..................................................................................................................... 31
Active ICC Values ..................................................................................................................... 32
Clock Stop, Stop Grant, and Auto HALT Power Down ICC Values .......................................... 33
AC Characteristics ................................................................................................................... 34
AC Specifications for the Test Access Port ............................................................................. 36
Thermal Resistance ................................................................................................................. 43
Maximum Ambient Temperature (TA) ...................................................................................... 43
iv




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