| Part Number | 74HCT11D |
| Manufacturer | nexperia (https://www.nexperia.com/) |
| Title | Triple 3-input AND gate |
| Description | The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inp... |
| Features |
and benefits
• Complies with JEDEC standard no. 7A • Input levels: • For 74HC11: CMOS level • For 74HCT11: TTL level • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Orderi... |
| Published | Dec 26, 2020 |
| Datasheet |
 74HCT11D File
|
| Part Number | 74HCT11PW |
| Manufacturer | nexperia |
| Title | Triple 3-input AND gate |
| Description | The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inp. |
| Features |
and benefits
• Complies with JEDEC standard no. 7A • Input levels: • For 74HC11: CMOS level • For 74HCT11: TTL level • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Orderi. |
| Datasheet |
74HCT11PW File
|
| Part Number | 74HCT11DB |
| Manufacturer | nexperia |
| Title | Triple 3-input AND gate |
| Description | The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inp. |
| Features |
and benefits
• Complies with JEDEC standard no. 7A • Input levels: • For 74HC11: CMOS level • For 74HCT11: TTL level • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Orderi. |
| Datasheet |
74HCT11DB File
|
| Part Number | 74HCT112D |
| Manufacturer | nexperia |
| Title | Dual JK flip-flop |
| Description | The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD). |
| Features |
individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the . |
| Datasheet |
74HCT112D File
|
| Part Number | 74HCT112 |
| Manufacturer | nexperia |
| Title | Dual JK flip-flop |
| Description | The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD). |
| Features |
individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the . |
| Datasheet |
74HCT112 File
|
