54F241 Datasheet PDF - National Semiconductor

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54F241
National Semiconductor

Part Number 54F241
Description (54F240 - 54F244) Octal Buffers/Line Drivers with TRI-STATE Outputs
Page 10 Pages


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May 1995
54F 74F24054F 74F24154F 74F244
Octal Buffers Line Drivers with TRI-STATE Outputs
General Description
The ’F240 ’F241 and ’F244 are octal buffers and line driv-
ers designed to be employed as memory and address driv-
ers clock drivers and bus-oriented transmitters receivers
which provide improved PC and board density
Features
Y TRI-STATE outputs drive bus lines or buffer memory
address registers
Y Outputs sink 64 mA (48 mA mil)
Y 12 mA source current
Y Input clamp diodes limit high-speed termination effects
Y Guaranteed 4000V minimum ESD protection
Commercial
74F240PC
74F240SC (Note 1)
74F240SJ (Note 1)
74F241PC
74F241SC (Note 1)
74F241SJ (Note 1)
74F244PC
74F244SC (Note 1)
74F244SJ (Note 1)
74F244MSA (Note 1)
Military
54F240DM (Note 2)
54F240FM (Note 2)
54F240LM (Note 2)
54F241DM (Note 2)
54F241FM (Note 2)
54F241LM (Note 2)
54F244DM (Note 2)
54F244FM (Note 2)
54F244LM (Note 2)
Package
Number
N20A
J20A
M20B
M20D
W20A
E20A
N20A
J20A
M20B
M20D
W20A
E20A
N20A
J20A
M20B
M20D
MSA20
W20A
E20A
Package Description
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Molded Shrink Small Outline EIAJ Type II
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use Suffix e SCX SJX and MSAX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9501
RRD-B30M75 Printed in U S A



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Connection Diagrams
’F240
Pin Assignment for LCC
’F241
’F244
TL F 9501–2
TL F 9501 – 4
Pin Assignment for DIP SOIC SSOP and Flatpak
TL F 9501 – 6
TL F 9501–1
Logic Symbols
IEEE IEC
’F240
TL F 9501 – 3
IEEE IEC
’F241
TL F 9501 – 5
IEEE IEC
’F244
TL F 9501–7
TL F 9501 – 8
2
TL F 9501 – 9



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Unit Loading Fan Out
Pin Names
Description
OE1 OE2
OE2
I0 – I7
I0 – I7
O0 – O7 O0 – O7
TRI-STATE Output Enable Input (Active LOW)
TRI-STATE Output Enable Input (Active HIGH)
Inputs (’F240)
Inputs (’F241 ’F244)
Outputs
Worst-case ’F240 enabled ’F241 ’F244 disabled
54F 74F
UL
HIGH LOW
1 0 1 667
1 0 1 667
1 0 1 667
1 0 2 667
600 106 6 (80)
Input IIH IIL
Output IOH IOL
20 mA b1 mA
20 mA b1 mA
20 mA b1 mA
20 mA b1 6 mA
b12 mA 64 mA (48 mA)
Truth Tables
’F240
OE1 D1n O1n OE2 D2n O2n
HXZHXZ
LHL LHL
L LHL LH
’F241
OE1 D1n O1n OE2 D2n O2n
HXZ LXZ
L HHHHH
L LLHLL
’F244
OE1 D1n O1n OE2
HXZH
L HH L
L LL L
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
D2n
X
H
L
O2n
Z
H
L
3



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Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Storage Temperature
b65 C to a150 C
Ambient Temperature under Bias
b55 C to a125 C
Junction Temperature under Bias
Plastic
b55 C to a175 C
b55 C to a150 C
VCC Pin Potential to
Ground Pin
b0 5V to a7 0V
Input Voltage (Note 2)
b0 5V to a7 0V
Input Current (Note 2)
b30 mA to a5 0 mA
Voltage Applied to Output
in HIGH State (with VCC e 0V)
Standard Output
TRI-STATE Output
b0 5V to VCC
b0 5V to a5 5V
Current Applied to Output
in LOW State (Max)
ESD Last Passing Voltage (Min)
twice the rated IOL (mA)
4000V
Note 1 Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired Functional operation under
these conditions is not implied
Note 2 Either voltage limit or current limit is sufficient to protect inputs
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
Commercial
b55 C to a125 C
0 C to a70 C
Supply Voltage
Military
Commercial
a4 5V to a5 5V
a4 5V to a5 5V
DC Electrical Characteristics
Symbol
VIH
VIL
VCD
VOH
VOL
IIH
IBVI
ICEX
VID
IOD
IIL
IOZH
IOZL
IOS
IZZ
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Current
54F 10% VCC
54F 10% VCC
74F 10% VCC
74F 10% VCC
74F 5% VCC
54F 10% VCC
74F 10% VCC
54F
74F
Input HIGH Current 54F
Breakdown Test 74F
Output HIGH
Leakage Current
54F
74F
Input Leakage
Test
74F
Output Leakage
Circuit Current
74F
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Bus Drainage Test
54F 74F
Min Typ Max
20
08
b1 2
24
20
24
20
27
0 55
0 55
20 0
50
100
70
250
50
4 75
b100
3 75
b1 0
b1 6
50
b50
b225
500
Units
V
V
V
V
V
mA
mA
mA
V
mA
mA
mA
mA
mA
mA
VCC
Min
Min
Min
Max
Max
Max
00
00
Max
Max
Max
Max
0 0V
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
IIN e b18 mA
IOH e b3 mA
IOH e b12 mA
IOH e b3 mA
IOH e b15 mA
IOH e b3 mA
IOL e 48 mA
IOL e 64 mA
VIN e 2 7V
VIN e 7 0V
VOUT e VCC
IID e 1 9 mA
All Other Pins Grounded
VIOD e 150 mV
All Other Pins Grounded
VIN e 0 5V (OE1 OE2 OE2 Dn (’F240))
VIN e 0 5V (Dn (’F241 ’F244))
VOUT e 2 7V
VOUT e 0 5V
VOUT e 0V
VOUT e 5 25V
4



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