4052 Datasheet PDF - Unisonic Technologies

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4052
Unisonic Technologies

Part Number 4052
Description DIFFERENTIAL 4-CHANNEL ANALOG MULTIPLEXERS/ DEMULTIPLEXER
Page 6 Pages


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UNISONIC TECHNOLOGIES CO., LTD
4052
DIFFERENTIAL 4-CHANNEL
ANALOG MULTIPLEXERS/
DEMULTIPLEXERS
DESCRIPTION
The UTC 4052 is differential 4-channel analog multiplexers/
demultiplexers for application as digitally–controlled analog switches.
The device has two binary control inputs and an inhibit input. It
feature low ON impedance and very low OFF leakage current.
Control of analog signals up to the complete supply voltage range
can be achieved.
FEATURES
* Wide Analog Voltage Range: VDD–VEE = 3V~18V.
(Note: VEE must beVSS)
* Break-Before-Make Switching Eliminates Channel Overlap.
* Linearized Transfer Characteristics
* Implement an DP4T Switch Effectively.
* Pin to Pin Replacement for CD4052
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
4052L-D16-T
4052G-D16-T
- 4052G-S16-R
- 4052G-P16-R
Package
DIP-16
SOP-16
TSSOP-16
CMOS IC
Packing
Tube
Tape Reel
Tape Reel
MARKING
DIP-16
SOP-16 / TSSOP-16
www.unisonic.com.tw
Copyright © 2015 Unisonic Technologies Co., LTD
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4052
PIN CONFIGURATION
CMOS IC
PIN DESCRIPTION
PIN No.
SYMBAL
NAME AND FUNCTION
13, 3
X,Y Commons Input/Output
6 INH Inhibit Input
7 VEE Supply Voltage
8
10,9
VSS Ground
A,B Binary Control Inputs
12,14,15,11
X0~X3 X Channel Inputs/Outputs
1,5,2,4
Y0~Y3 Y Channel Inputs/Outputs
16 VDD Positive Supply Voltage
Note: Control Inputs referenced to VSS. Analog Inputs and Outputs reference to VEE. VEE must be VSS.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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4052
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATINGS
UNIT
DC Supply Voltage (Referenced to VEE, VSSVEE)
VDD -0.5 ~ +18 V
Input or Output Voltage (DC or Transient)
(Referenced to VSS for Control Inputs and VEE for Switch I/O)
VIN, VOUT
-0.5 ~ VDD +0.5
V
Input Current (DC or Transient), per Control Pin
IIN ±10 mA
Switch Through Current
ISW ±25 mA
Power Dissipation
Derating above 65°C
PD
700 mW
7 mW/°C
Junction Temperature
TJ 125 °C
Operating Temperature
TOPR
-40 ~ +125
°C
Storage Temperature
TSTG
-40 ~ +150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ELECTRICAL CHARACTERISTICS (TA=25°C, unless otherwise specified.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
SUPPLY REQUIREMENTS (Voltages Referenced to VEE)
Power Supply Voltage Range
VDD VDD – 3VSSVEE
Quiescent
Package
Current
per
VDD=5V
VDD=10V
VDD=15V
Control Inputs: VIN = VSS or VDD
IQ Switch I/O: VEE VI/O VDD,
and VSW500mV(Note 2)
3 18
0.005 5
0.010 10
0.015 20
Total Supply Current VDD=5V
(Dynamic Plus Quiescent, VDD=10V
Per Package)
VDD=15V
ID(AV)
TA=25°C only (The channel
component, (VIN-VOUT)/RON,
is excluded.)
(0.07 µA/kHz) f + IQ
(0.20 µA/kHz) f + IQ
(0.36 µA/kHz) f + IQ
SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y, Z (Voltages Referenced to VEE)
Recommended Peak to Peak Voltage
Into or Out of the Switch
VI/O
Channel On or Off
0
VDD
Recommended Static or Dynamic
Voltage Across the Switch (Note2)
VSW
Channel On
0 600
Output Offset Voltage
ON Resistance
VDD=5V
VDD=10V
VDD=15V
VO(OFF)
RON
VIN = 0V, No Load
VSW500mV (Note2)
VIN = VIL or VIH (Control), and
VIN = 0 to VDD (Switch)
10
250 1050
120 500
80 280
ON Resistance Between VDD=5V
Any Two Channels in the VDD=10V
Same Package
VDD=15V
Off Channel Leakage Current
RON
VIN = VIL or VIH (Control) Channel to
IOFF Channel or Any One Channel,
VDD=15V
25 70
10 50
10 45
±0.05 ±100
Capacitance, Switch I/O
Capacitance, Common O/I
CI/O Inhibit = VDD
CO/I Inhibit = VDD
10
17
Capacitance, Feedthrough
(Channel Off)
CI/O
Pins Not Adjacent
Pins Adjacent
0.15
0.47
V
µA
µA
µA
µA
µA
µA
VPP
mV
µV
nA
pF
pF
pF
CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to VSS)
VDD=5V
Low Level Input Voltage VDD=10V VIL RON= per spec, IOFF = per spec
VDD=15V
VDD=5V
High Level Input Voltage VDD=10V VIH RON= per spec, IOFF = per spec
VDD=15V
Input Leakage Current
ILEAK VIN= 0 or VDD, VDD=15V
Input Capacitance
CIN
2.25 1.5
4.50 3.0
6.75 4.0
3.5 2.75
7.0 5.50
11 8.25
±0.00001 ±0.1
5.0 7.5
V
V
V
V
V
V
µA
pF
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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4052
CMOS IC
DYNAMIC ELECTRICAL CHARACTERISTICS
(CL = 50pF, TA=25°C, VEEVSS, unless otherwise specified)
PARAMETER
SYMBOL
VDD-VEE
VDC
TEST CONDITIONS
Propagation Delay Times
5 tPLH, tPHL =(0.17 ns/pF)CL + 21.5ns
MIN TYP MAX UNIT
30 75 ns
Switch Input to Switch tPLH, tPHL
Output (RL = 10 k)
10 tPLH, tPHL =(0.08 ns/pF)CL + 8.0ns
15 tPLH, tPHL =(0.06 ns/pF)CL + 7.0ns
12 30 ns
10 25 ns
Inhibit to Output
tPHZ, tPLZ
tPZH, tPZL
5 (RL=10k, VEE=VSS)
10 Output “1” or “0” to High Impedance,
15 or High Impedance to “1” or “0” Level
300 600
155 310
125 250
ns
ns
ns
5 325 650 ns
Control Input to Output
tPLH, tPHL
10 RL = 10 k, VEE = VSS
15
130 260
90 180
ns
ns
Total Harmonic Distortion
Bandwidth
THD
BW
10 RL = 10K, f = 1 kHz, VIN = 5 VPP
10
RL = 1k, VIN = 1/2 (VDD–VEE) p–p,
CL = 50pF, 20 Log (VOUT/VIN) = -3dB)
0.07
17
%
MHz
Off Channel Feedthrough
Attenuation
Channel Separation
10
RL=1K, VIN = 1/2 (VDD–VEE) p–p
fIN = 30MHz
10
RL = 1k, VIN = 1/2 (VDD–VEE) p–p
fIN = 3MHz
-50 dB
-50 dB
Crosstalk, Control Input to
Common O/I
10
R1 = 1k, RL = 10kControl
tTLH = tTHL = 20ns, Inhibit = VSS
75 mV
Notes: 1. Data of “TYP” is intended as an indication of the IC’s potential performance.
2. For voltage drops across the switch(VSW)>600mV (>300mV at high temperature), excessive VDD current
may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The
reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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