4030B Datasheet PDF - Intersil Corporation

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4030B
Intersil Corporation

Part Number 4030B
Description CMOS Quad Exclusive-OR Gate
Page 7 Pages


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CD4030BMS
December 1992
CMOS Quad Exclusive-OR Gate
Features
Pinout
• High Voltage Type (20V Rating)
• Medium-Speed Operation
- tPHL, tPLH = 65ns (typ) at VDD = 10V, CL = 50pF
• 100% Tested for Quiescent Current at 20V
• Standardized Symmetrical Output Characteristics
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current Of 1µA at 18V Over Full
Package-Temperature Range;
- 100nA at 18V and +25oC
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
CD4030BMS
TOP VIEW
A1
B2
J=AB 3
K=CD 4
C5
D6
VSS 7
14 VDD
13 H
12 G
11 M = G H
10 L = E F
9F
8E
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Functional Diagram
Applications
• Even and Odd-Parity Generators and Checkers
• Logical Comparators
• Adders/Subtractors
• General Logic Functions
Description
The CD4030BMS types consist of four independent Exclu-
sive-OR gates. The CD4030BMS provides the system
designer with a means for direct implementation of the
Exclusive-OR function.
The CD4030BMS is supplied in these 14-lead outline pack-
ages:
Braze Seal DIP H4H
Frit Seal DIP
H1B
Ceramic Flatpack H3W
A1
B2
C5
6
D
E8
9
F
12
G
H 13
3J
4
K
10
L
11 M
J=AB
M=GH
K=CD
L=EF
VSS = 7
VDD = 14
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-317
File Number 3305

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